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Financial Programming Greatly Accelerated

Published in Automated Trader Magazine Issue 42 Q1 2017

FPGAs are about to become a lot more attractive as the technology of choice for cutting-edge application development. Pre-compiled numerical libraries and an integrated software stack, combined with a new class of closely-coupled silicon devices, are the drivers.


Olivier Cousin

Olivier Cousin is responsible for building libraries of FPGA accelerators in the High Level Synthesis Group at Intel. Prior to that, Olivier worked as a front office quantitative developer accelerating trading platforms at RBS. He holds a Masters in Digital Electronics and Parallel Processing Systems and a Certificate in Quantitative Finance from the CQF Institute.

Stephen Weston

Stephen Weston is a Principal Engineer and Libraries Architect in the Programmable Solutions Group at Intel. Stephen has over 25 years experience in investment banking in trading, quantitative research and risk management. He is also a visiting professor at Imperial College London and holds a PhD in Mathematical Finance.

Innovation has always been and will always be the lifeblood of financial markets. In recent years, the most important innovations have been technological. Massive increases in network bandwidth and hardware processor speeds have allowed an ever-growing proportion of trading to take place electronically rather than via voice (open outcry or telephone). This trend has been reinforced by regulatory changes that have encouraged centralised rather than bilateral clearing and exchange-based rather than over-the-counter (OTC) trading.

These developments made the financial markets increasingly competitive and latency-sensitive. It has become harder to develop and maintain a competitive edge in trading.

In this article, we first draw a qualitative picture of the current technology landscape. We then explore how numerical libraries for hardware, combined with an integrated software stack, offer one way to make efficient use of Field Programmable Gate Arrays (FPGAs) to turn such challenges into opportunities.

The technology Landscape

The rise of latency sensitivity

The blink of a human eye takes 300 milliseconds. Exchanges and other trading platforms now find themselves dealing with customers who want to execute a trade in under 100 nanoseconds - less than one 3,000,000th of a blink.

The big data tsunami

As technology has enabled more trading to become electronic, high-frequency trading has become mainstream. For liquidity providers, electronic market making is the norm and for liquidity takers, algorithmic execution is standard. Due to these changes, quotation volumes have skyrocketed - the US equity options market alone peaks at over 25 million quotes and trades per second, compared with less than 1.5 million in 2010. Such rapid change has imposed a huge technology burden on both buy-side and sell-side firms, as well as exchanges and clearinghouses. Massive volumes of data - prices, orders and trades - have to be cleaned, stored and maintained.

The quest for advanced AI

The combination of greater data availability and faster processors to analyse that data allows the use of increasingly sophisticated techniques such as machine learning and artificial intelligence (AI). Recent news stories have highlighted the uptake of these technologies at high profile investment management firms.

The coming of age of 'hyperliquidity'

One key development that has had a fundamental impact on many electronic markets is the trend towards so-called 'hyperliquidity'. This describes a situation where the velocity, volume and variety of digital data have pushed the transparency and efficiency of a market to a state at which they are at (or very close to) their highest possible levels. According to Belt and Boudier, who coined the term in 2016, there are three main forces pushing markets towards hyperliquidity, namely:

  • An increasing degree of standardisation via trading on exchanges using standardised contracts.
  • Greater transparency of information. This occurs due to digital dissemination at ever greater speeds, producing close to perfect information for all professional market participants.
  • The emergence of an advanced digital infrastructure, in particular, colocation facilities using high speed links. Other examples include market access via convenient and efficient APIs, efficient and transparent matching engines etc.

Many markets that are characterised by electronic trading - such as equities, foreign exchange, futures and some interest rate derivatives - have entered a de facto state of hyperliquidity. This has resulted in the dominance of trading platforms which has in turn led to a significantly reduced level of human intervention. Decision-making is increasingly initiated and managed by algorithms fed by high-speed, automated digital data feeds. Traded volume is dominated by market makers that use algorithm-based trading capabilities of varying degrees of sophistication. Trading strategies rely on combinations of speed, low latency, optimised execution and relative value-driven cross-asset trading.

FPGAs in trading

Advantages of FPGAs

In trading, the speed, low latency and minimal jitter of FPGAs make them attractive for network applications, packet inspection and handling digital data feeds. Other key advantages of FPGAs are their capability to be totally or partially re-programmed on the fly - thus avoiding having to bring down a system every time a program needs to be changed. Finally, FPGAs are deterministic in their performance regardless of the load, which makes them especially useful in networks and market decoders/feed handlers.

Current limitations

FPGA usage in finance and trading has not spread far beyond the known applications in networks, packet inspection and digital feed handling due to three main reasons:

  • Most significantly, FPGA programming is difficult and many of the supporting tools have not reached a mature state. This has resulted in long lead times before arriving at a finished algorithm ready for deployment. On-going support and maintenance are also scarce.
  • Second, there is a lack of an integrated software infrastructure for FPGAs that would enable CPU-familiar software engineers to easily migrate and integrate their innovations into existing software stacks.
  • Third, there is almost a total lack of libraries of pre-compiled and optimised numerical functions needed to quickly make a prototype for any new and potentially complex trading application. This is in full contrast with CPUs, where both native libraries (such as math.h) and advanced C/C++ libraries (such as Intel® MKL, Math Kernel Library and IPP, Intel Performance Primitives) exist. These enable fast R&D followed by an equally fast deployment of new algorithms and strategies.

Recent advancements in FPGA hardware and software are beginning to address these issues directly.

Developments in the FPGA sector

The first major developments are new CPU+FPGA devices that are now reaching the market in volume and enable tighter and more efficient coupling of the two technologies. As data is written directly into the processor cache, bypassing inefficient transactions via the standard PCIe interface, these devices provide access to higher performance and flexibility. They have been well discussed in the literature and are not the focus of this article (the interested reader is referred to %-REF-%).

Second, pre-compiled libraries of numerical functions for FPGAs are now available. Access to these libraries is simplified by an accompanying new software infrastructure enabling communication between the FPGA and the CPU running the main application. This enables developers to access the power and flexibility of a FPGA with minimal knowledge of how FPGAs work. To the authors' knowledge, this is the first extension of FPGA functionality aimed at the CPU software developer and is the subject of the remainder of this article.

Financial libraries for FPGAs

Adapted software infrastructure

Before discussing the numerical libraries for FPGA, let us first examine the entire accompanying software stack. This has been developed to provide simple and efficient access to the FPGA libraries directly from a standard C/C++ main.cpp. Figure 01 illustrates how to orchestrate the accelerators, manage the data and provide a standard interface to allow portability. The aim is to deliver convenient and fast FPGA access to the CPU software programmer, without the need to develop any FPGA code. The stack is designed to provide access to FPGA numerical functions and algorithms at several levels:

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